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A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard

机译:采用自动频率控制的IEEE 802.11a无线局域网标准的5 GHz直接转换CMOS收发器

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A fully integrated CMOS direct-conversion 5-GHz transceiver with automatic frequency control is implemented in a 0.18-Μm digital CMOS process and housed in an LPCC-48 package. This chip, along with a companion baseband chip, provides a complete 802.11a solution The transceiver consumes 150 mW in receive mode and 380 mW in transmit mode while transmitting +15-dBm output power. The receiver achieves a sensitivity of better than -93.7dBm and -73.9dBm for 6 Mb/s and 54 Mb/s, respectively (even using hard-decision decoding). The transceiver achieves a 4-dB receive noise figure and a +23-dBm transmitter saturated output power. The transmitter also achieves a transmit error vector magnitude of -33 dB. The IC occupies a total die area of 11.7 mm2 and is packaged in a 48-pin LPCC package. The chip passes better than ±2.5-kV ESD performance. Various integrated self-contained or system-level calibration capabilities allow for high performance and high yield.
机译:具有0.18μm数字CMOS工艺的具有自动频率控制功能的完全集成CMOS直接转换5 GHz收发器采用LPCC-48封装。该芯片与配套的基带芯片一起,提供了完整的802.11a解决方案。收发器在发送+15 dBm输出功率的同时,在接收模式下消耗150 mW,在发送模式下消耗380 mW。对于6 Mb / s和54 Mb / s的接收器,其灵敏度分别高于-93.7dBm和-73.9dBm(即使使用硬判决解码)。该收发器实现了4dB的接收噪声系数和+ 23dBm的发射机饱和输出功率。发射器还实现了-33 dB的发射误差矢量幅度。该IC的总芯片面积为11.7 mm2,并采用48引脚LPCC封装。该芯片的ESD性能优于±2.5kV。各种集成的自包含或系统级校准功能可实现高性能和高产量。

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