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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A double-sampling pseudo-two-path bandpass ΔΣ modulator
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A double-sampling pseudo-two-path bandpass ΔΣ modulator

机译:双采样伪双路径带通ΔΣ调制器

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A double-sampling pseudo-two-path bandpass ΔΣnmodulator is proposed. This modulator has an output rate equal to twicenthe clock rate, uses n/2 operational amplifiers (op-amps) for annnth-older noise transfer function, and has reduced clock feedthrough innthe signal path band. The required clocks can be simpler to implementnthan the conventional pseudo-two-path techniques. The measurednsignal-to-noise ratio and dynamic range of the fourth-orderndouble-sampling pseudo-two-path bandpass ΔΣ modulator in an30-kHz bandwidth at a center frequency of 2.5 MHz (at a clock frequencynof 5 MHz) are 62 and 68 dB, respectively
机译:提出了一种双采样伪双路径带通ΔΣn调制器。该调制器的输出速率等于时钟速率的两倍,使用n / 2个运算放大器(op-amps)来实现较老的噪声传递功能,并且在信号路径频带中降低了时钟馈通。所需的时钟比传统的伪双路径技术更易于实现。在中心频率为2.5 MHz(时钟频率为5 MHz),30 kHz带宽下,四阶双采样伪双路径带通ΔΣ调制器的n信噪比和动态范围为62 dB和68 dB , 分别

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