Power rail logic: a low power logic style for digital GaAs circuits

Chandna A.; Brown R.B.

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Power rail logic: a low power logic style for digital GaAs circuits

机译：电源轨逻辑：数字GaAs电路的低功耗逻辑样式

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This paper describes a new logic style called Power Rail Logic (PRL), which is compatible with direct-coupled FET logic (DCFL) circuits. Multiplexors, latches, flip-flops, and exclusive-OR gates can be built using this logic style. Compared to DCFL, PRL uses fewer transistors, has larger noise margins, and up to 40% lower power-delay products. A test chip containing 32-b barrel shifters designed in DCFL and in PRL was successfully fabricated and tested. Test results are given for both circuits.

机译：本文介绍了一种称为Power Rail Logic（PRL）的新逻辑样式，该样式与直接耦合FET逻辑（DCFL）电路兼容。可以使用这种逻辑样式构建多路复用器，锁存器，触发器和异或门。与DCFL相比，PRL使用更少的晶体管，具有更大的噪声容限，并且功耗降低了多达40％。成功制造并测试了包含在DCFL和PRL中设计的包含32-b桶形移位器的测试芯片。给出了两个电路的测试结果。

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来源
《IEEE Journal of Solid-State Circuits》 |1995年第10期|P.1096-1100|共5页
作者
Chandna A.; Brown R.B.;
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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类一般性问题;基本电子电路;
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3. Cell Design Methodology Based on Transmission Gate for Low-Power High-Speed Balanced XOR-XNOR Circuits in Hybrid-CMOS Logic Style [J] . Tooraj Nikoubin, Mahdieh Grailoo, Sayyed Hasan Mozafari Journal of Low Power Electronics . 2010,第4期

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4. Power Rail Logic: A Low Power Logic Style For Digital gaas Circuits [C] . Chandna, A., Brown, . 2001

机译：电源轨逻辑：适用于数字gaas电路的低功耗逻辑
5. Accurate power estimation of CMOS digital circuits and its application to low-power digital logic synthesis. [D] . Chou, Tan-Li. 1996

机译：CMOS数字电路的准确功率估计及其在低功率数字逻辑合成中的应用。
6. Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model [O] . Omnia S. Fadl, Mohamed F. Abu-Elyazeed, Mohamed B. Abdelhalim, 2016

机译：具有实际门延迟模型的CMOS组合逻辑电路的准确动态功率估算
7. Ultralow-power GaAs MESFET MSI circuits using two-phase dynamic FET logic [O] . Lassen Peter Stuhr, Long S. I., Nary K. R. 1993

机译：采用两相动态FET逻辑的超低功耗Gaas mEsFET msI电路
8. Power Rail Logic: A Low Power Logic Style for Digital GaAs Circuits [R] . Chandna, A., Brown, R. B., Putti, D., 1996

机译：功率轨逻辑：数字Gaas电路的低功耗逻辑类型

Power rail logic: a low power logic style for digital GaAs circuits

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