Experimental study of back gate bias effect and short channel effect in ultra-thin buried oxide tri-gate nanowire MOSFETs

著录项

• 来源
  《Solid-State Electronics》 |2014年第1期|123-126|共4页
• 作者

  K. Ota; M. Saitoh; C. Tanaka; T. Numata;

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• 作者单位

  Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1 Koumukai-Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan;

  Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1 Koumukai-Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan;

  Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1 Koumukai-Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan;

  Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1 Koumukai-Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan;

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• 原文格式 PDF
• 正文语种 eng
• 中图分类
• 关键词

  Silicon nanowire transistor; Back gate bias effect;

  机译：硅纳米线晶体管;背栅偏置效应;