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首页> 外文期刊>Solid-State Electronics >Scaling of Trigate nanowire (NW) MOSFETs to sub-7 nm width: 300 K transition to Single Electron Transistor
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Scaling of Trigate nanowire (NW) MOSFETs to sub-7 nm width: 300 K transition to Single Electron Transistor

机译:将Trigate纳米线(NW)MOSFET缩放至7纳米以下的宽度:300 K过渡到单电子晶体管

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摘要

In this paper we show that on scaling nanowire width from 20 nm down to sub-7 nm regime, together with achieving excellent short channel effect control (DIBL - 12 mV/V for L_G - 20 nm), we hit a dramatic transition in transport mechanism from monotonously increasing I_D-V_G of a FET to oscillating I_D-V_G of a Single Electron Transistor. This transition in transport mechanism is brought about by process induced channel potential variability. It poses a challenge to further scaling of nanowire MOSFETs. However, we show that it provides an exciting opportunity to cointegrate Single Electron Transistors with high-k/metal gate operating at room temperature (at V_D = ±0.9 V) with the state-of-the-art nanowire MOSFETs enabling large scale manufacturing of Beyond Moore devices.
机译:在本文中,我们表明,在将纳米线宽度从20 nm缩小到7 nm以下时,再加上出色的短沟道效应控制(对于L_G-20 nm,DIBL-12 mV / V),我们在传输方面实现了显着转变从单调增加FET的I_D-V_G到振荡单电子晶体管的I_D-V_G的原理。转运机制的这种转变是由过程诱导的沟道电势可变性引起的。这对纳米线MOSFET的进一步规模化提出了挑战。但是,我们表明,它为将单电子晶体管与在室温(V_D =±0.9 V)下运行的高k /金属栅极与最新的纳米线MOSFET集成在一起提供了令人兴奋的机会。超越摩尔设备。

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  • 来源
    《Solid-State Electronics》 |2013年第6期|179-184|共6页
  • 作者单位

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

    CEA-LETI, Minatec Campus and CEA-INAC, 17 rue des Martyrs, F-38054 Grenoble, France;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Silicon nanowire; Single Electron Transistor; Coulomb blockade; Room temperature; CMOS;

    机译:硅纳米线;单电子晶体管;库仑封锁;室内温度;CMOS;

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