Optimum bias of power transistor in 0.18 μm CMOS technology for Bluetooth application

Heng-Ming Hsu; Tai-Hsing Lee

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Optimum bias of power transistor in 0.18 μm CMOS technology for Bluetooth application

机译：适用于蓝牙应用的采用0.18μmCMOS技术的功率晶体管的最佳偏置

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Based on the proposed silicon integrated power transistor adopting a 0.18 μm technology, its performance shows this novel device can be operated at 2.4 GHz for Bluetooth and lithium battery applications [Hsu H-M, Su J-G, Chen C-W, Tang DD, Chen CH, Sun JY-C. Integrated power transistor in 0.18 μm CMOS technology for RF system-on-chip applications. IEEE Trans Microwave Theory Tech 2002;50(December):2873-81]. After executing matrix measurement of large-signal characteristics, the optimal quiescent point can be found, and the associated large-signal performance exhibits a maximum output power with 21.26 dBm, corresponding to a value of 44.3% for power added efficiency (PAE). Therefore, this device can be used in handholds for short-distance, low-power, and high-frequency operation.

机译：基于拟议的采用0.18μm技术的硅集成功率晶体管，其性能表明，该新型器件可在2.4 GHz频率下运行，用于蓝牙和锂电池应用[Hsu HM，Su JG，Chen CW，Tang DD，Chen CH，Sun JY -C。采用0.18μmCMOS技术的集成功率晶体管，用于RF片上系统应用。 IEEE Trans Microwave Theory Tech 2002； 50（12月）：2873-81]。在执行大信号特性的矩阵测量之后，可以找到最佳的静态点，并且相关的大信号性能显示出最大输出功率，为21.26 dBm，对应于功率附加效率（PAE）的44.3％值。因此，该设备可用于短距离，低功率和高频操作的手持设备。

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来源
《Solid-State Electronics》 |2006年第3期|p.412-415|共4页
作者
Heng-Ming Hsu; Tai-Hsing Lee;
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作者单位

Department of Electrical Engineering, National Chung-Using University, No. 250, Kuo-Kwang Road, Taichung 402-27, Taiwan, ROC;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
原文格式 PDF
正文语种 eng
中图分类一般性问题;
关键词
bluetooth; CMOS technology; large-signal; optimum bias; power transistor;

机译：蓝牙;CMOS技术;大信号;最佳偏置;功率晶体管;

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专利

1. Integrated power transistor in 0.18-/spl mu/m CMOS technology for RF system-on-chip applications [J] . Heng-Ming Hsu, Jiong-Guang Su, Chih-Wei Chen, IEEE Transactions on Microwave Theory and Techniques . 2002,第12期

机译：采用0.18- / spl mu / m CMOS技术的集成功率晶体管，用于RF片上系统应用
2. Optimization of lateral double-diffused MOS transistors in 0.18 μm bipolar-CMOS-DMOS technology for wide-voltage applications [J] . Y O Choi, S Y Kim Semiconductor science and technology . 2010,第11期

机译：采用0.18μm双极CMOS-DMOS技术优化横向双扩散MOS晶体管，适用于宽电压应用
3. Cost-Effective Integrated RF Power Transistor in 0.18-$muhboxm$CMOS Technology [J] . Yan T., Liao H., Xiong Y.Z., IEEE Electron Device Letters . 2006,第期

机译：采用0.18- $ muhboxm $ CMOS技术的具有成本效益的集成RF功率晶体管
4. 24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS [C] . Wei-Han Yu, Haidong Yi, Pui-In Mak, IEEE International Solid- State Circuits Conference . 2017

机译：24.4一个具有1.33nW睡眠功率的0.18V 382µW蓝牙低功耗（BLE）接收器，用于28nm CMOS的能量收集应用
5. A 12-bit, 40 msamples/s, low-power, low-area pipeline analog-to-digital converter in CMOS 0.18 mum technology. [D] . Mohajerin, Mani. 2004

机译：采用CMOS 0.18毫米技术的12位，40 msamples / s，低功耗，低面积流水线模数转换器。
6. An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications [O] . Mayukh Bhattacharyya, Waldemar Gruenwald, Dirk Jansen, 2018

机译：采用0.18μmCMOS技术的超低功耗RFID / NFC前端IC用于无源标签应用
7. A Universal Amplifier Module (UAM) in 0.18 µm CMOS (CMOSP18/TSMC) Technology With Some Applications in Analog Signal Processing [O] . Talukder Md. Aminul Haque 2011

机译：采用0.18 µm CMOS（CMOSP18 / TSMC）技术的通用放大器模块（UAM）及其在模拟信号处理中的一些应用

Optimum bias of power transistor in 0.18 μm CMOS technology for Bluetooth application

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