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Nanowires as Building Blocks for Self-Assembling Logic and Memory Circuits

机译:纳米线作为自组装逻辑和存储电路的基础

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摘要

The concept of assembling electronic circuits from metal nanowires is discussed. These nanowires are synthesised electrochemically by using poroous membranes as templates. High aspect ratio wires, which range from 15 to 350 nm in diameter and contain "stripes" of different metals, semiconductors, colloid/polymer multi-layers, and self-assembling monolayers have been made by this technique. By using the distinct surface chemistry of different stripes, the nanowires can be selectively derivatized and positioned on patterned surfaces. This allows teh current-voltage properties of single and crossed nanowire devices to be measured. Nanowire conductors, rectifiers, switches, and photoconductors have been characterized. Techniques are still being developed for assembling sublithographic scale nanowires into cross-point arrays for memory and logic applications.
机译:讨论了从金属纳米线组装电子电路的概念。这些纳米线通过使用多孔膜作为模板电化学合成。通过该技术已经制备了直径在15至350nm范围内并且包含不同金属,半导体,胶体/聚合物多层和自组装单层的“条纹”的高长宽比的线。通过使用不同条纹的不同表面化学性质,可以选择性地衍生纳米线并将其置于图案化的表面上。这允许测量单个和交叉的纳米线器件的电流-电压特性。纳米线导体,整流器,开关和光电导体已被表征。仍在开发将亚光刻级纳米线组装到交叉点阵列以用于存储器和逻辑应用的技术。

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