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High-speed logic gates based on multiple-β transistor

机译:基于多重β晶体管的高速逻辑门

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The high-speed and real-time processing of information requires a higher and higher operating speed for digital-integrated circuits. Making efforts to exploit silicon-integrated circuits with high speed, scientists pay attention to the bipolar-integrated circuits. The bipolar transistor is suitable for high-speed operation since its junction capacitance is smaller. Besides, the forward conduction characteristic of the PN junction leads transistor's emitter junction to have higher function complexity.For example, the multiemitter transistor in TTL circuits can be conveniently used in AND operation between input signals, and the emitter output of ECL circuits can be simply used to realize wired-OR operation several output signals by interconnecting them with each other. Emitter function logic (EFL) can be viewed as the repartitioned form of ECL. The EFL circuit shown in fig. 1(a) is typical which fully applies the emitter logic functions. Emitters of the input transistor in the circuit are used forAND operation. The transistor T_i is cut off and its output is of high level (about V_(CC)-0.8V) if inputs A_1 and A_2 are high. On the other hand, if there is a low level in A_1 or A_2, the transistor T_i will be conductive and the base node of the output transistor T_0 is about V_(CC)-0.8V because of the diode clamp. Therefore, the output of the circuit is about V_(CC)-1.6V. Each emitter of the output multiemitter transistor T_0 can be independently used to perform wired-OR operation with other outputs.
机译:信息的高速实时处理要求数字集成电路的运行速度越来越高。为了高速开发硅集成电路,科学家们对双极集成电路给予了关注。双极晶体管的结电容较小,因此适用于高速操作。此外,PN结的正向导通特性导致晶体管的发射极结具有更高的功能复杂性,例如,TTL电路中的多发射极晶体管可以方便地用于输入信号之间的AND操作,而ECL电路的发射极输出可以简单地实现用于通过将多个输出信号相互连接来实现线或运算。发射器功能逻辑(EFL)可以看作是ECL的重新分区形式。 EFL电路如图2所示。典型地,图1(a)充分地应用了发射极逻辑功能。电路中输入晶体管的发射极用于与运算。如果输入A_1和A_2为高电平,则晶体管T_i截止并且其输出为高电平(大约V_(CC)-0.8V)。另一方面,如果在A_1或A_2中存在低电平,则由于二极管钳位,晶体管T_i将导通并且输出晶体管T_0的基极约为V_(CC)-0.8V。因此,电路的输出约为V_(CC)-1.6V。输出多发射极晶体管T_0的每个发射极可独立用于与其他输出进行线或运算。

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