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首页> 外文期刊>Journal of Low Power Electronics >An Improved Reconfigurable Finite Impulse Response Filter Using Common Subexpression Elimination Algorithm for Cognitive Radio
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An Improved Reconfigurable Finite Impulse Response Filter Using Common Subexpression Elimination Algorithm for Cognitive Radio

机译：改进的可重构有限冲激响应滤波器，使用通用子表达式消除算法进行认知无线电

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摘要

This brief presents an improved reconfigurable finite impulse response (FIR) filter architecture using binary common subexpression elimination (BCSE) algorithm for multistandard wireless receiver applications such as spectrum sensing and channelization. Detecting the presence of primary users and the ability to find white spaces in the licensed spectrum are the key enablers of the opportunistic communication. Filter bank based spectrum sensing employs a bank of FIR filters to extract the individual channel information from the received wideband input signal and to detect the spectrum occupancy by comparing each subband energy with a specific threshold. In this work, a novel architecture of constant shift method (CSM) based multiplier using the 2-bit BCSE algorithm for reconfigurable FIR filter is proposed, which can be employed in filter bank based spectrum sensing applications. This paper analyzes the implementation of 18-tap and 20-tap FIR filters using the proposed CSM multiplier in terms of hardware resources, speed and power consumption. The proposed filter architecture is realized on Application Specification Integrated Circuits (ASIC) platform using SAED90nm CMOS technology. The synthesis results of the proposed FIR filter shows reduction of 67%, 71% in area delay product (ADP) and 71%, 72% in power delay product (PDP) for 18-tap and 20-tap FIR filters, respectively compared to the 3-bit BCSE technique. Likewise, it achieves reduction of 31%, 34% in ADP and 34%, 37% in PDP, respectively compared to the existing 2-bit BCSE algorithm based reconfigurable FIR filter implementation.
机译：本文简要介绍了一种改进的可重配置的有限冲激响应（FIR）滤波器架构，该架构使用二进制通用子表达式消除（BCSE）算法来实现多标准无线接收器应用，例如频谱检测和信道化。检测主要用户的存在以及在许可频谱中查找空白的能力是机会通信的关键推动力。基于滤波器组的频谱检测采用一组FIR滤波器，从接收到的宽带输入信号中提取单个信道信息，并通过将每个子带能量与特定阈值进行比较来检测频谱占用。在这项工作中，提出了一种新颖的基于恒定移位方法（CSM）的乘法器架构，该架构使用2位BCSE算法用于可重构FIR滤波器，可在基于滤波器组的频谱感测应用中使用。本文从硬件资源，速度和功耗方面分析了使用建议的CSM乘法器实现的18抽头和20抽头FIR滤波器的实现。利用SAED90nm CMOS技术，在应用规范集成电路（ASIC）平台上实现了所提出的滤波器架构。拟议的FIR滤波器的综合结果显示，与18抽头和20抽头FIR滤波器相比，FIR滤波器的面积延迟乘积（ADP）分别降低67％，71％，功率延迟乘积（PDP）降低71％，72％。 3位BCSE技术。同样，与现有的基于2位BCSE算法的可重构FIR滤波器实现相比，它在ADP中的功耗分别降低了31％，34％和34％，37％。

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