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Design Equivalent Scaling on Double Gate FinFET Towards Analog and RF Figures of Merits: A Technology Computer Aided Design Estimation

机译:双栅极FinFET上的设计等效缩放比例,以达到模拟和射频优点:一种技术计算机辅助设计估计

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摘要

The goal of device designing is to meet the specification for future technologies and improve the performance of the device in comparison to earlier generations. In this article a comparison made through structural modification of Double Gate (DG) FinFET. Simulation model accounting for various performances like dc as well as analog/RF figures of merit (FOMs) are developed with different channel and gate engineering. Five structures [Fully Doped (FD), Un-Doped (UD), Graded Channel (GC), Dual Insulator (DI) and Gate Stack (GS)] of DG-FinFET used for analysis of underlying effects. Moreover, we have analyzed significant parameters like on current (I_(on)), on-off ratio (I_(on)/I_(off)), potential, electric field, transconductance generation factor (TGF), gate-to-source capacitance (C_(gs)), cut-off frequency (f_T), and transconductance frequency product (TFP) for various device design architectures.
机译:设备设计的目标是满足未来技术的规范,并与早期产品相比提高设备的性能。本文通过对双栅极(DG)FinFET的结构进行了比较。利用不同的通道和栅极工程开发了考虑到各种性能(例如直流以及模拟/ RF品质因数(FOM))的仿真模型。 DG-FinFET的五种结构[全掺杂(FD),无掺杂(UD),渐变沟道(GC),双绝缘体(DI)和栅堆叠(GS)]用于分析潜在效应。此外,我们分析了重要的参数,例如导通电流(I_(on)),开/关比(I_(on)/ I_(off)),电势,电场,跨导生成因子(TGF),栅极-源极各种器件设计架构的电容(C_(gs)),截止频率(f_T)和跨导频率乘积(TFP)。

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