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首页> 外文期刊>Journal of Semiconductors >A low-power CMOS WIA-PA transceiver with a high sensitivity GFSK demodulator
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A low-power CMOS WIA-PA transceiver with a high sensitivity GFSK demodulator

机译:具有高灵敏度GFSK解调器的低功耗CMOS WIA-PA收发器

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摘要

This paper presents a low power, high sensitivity Gaussian frequency shift keying (GFSK) demodulator with a flexible frequency offset canceling method for wireless networks for industrial automation process automation (WIA-PA) transceiver fabricated in 0.18 μm CMOS technology. The receiver uses a low-IF (1.5 MHz) architecture, and the transmitter uses a sigma delta PLL based modulation with Gaussian low-pass filter for low power consumption. The active area of the demodulator is 0.14 mm~2. Measurement results show that the proposed demodulator operates without harmonic distortion, deals with ±180 kHz frequency offset, needs SNR only 18.5 dB at 0.1% bit-error rate (BER), and consumes no more than 0.26 mA from a 1.8 V power supply.
机译:本文针对采用0.18μmCMOS技术制造的工业自动化过程自动化(WIA-PA)收发器的无线网络,提出了一种具有灵活频偏抵消方法的低功耗,高灵敏度高斯频移键控(GFSK)解调器。接收器使用低中频(1.5 MHz)架构,而发送器使用基于sigma delta PLL的调制和高斯低通滤波器,以降低功耗。解调器的有效面积为0.14 mm〜2。测量结果表明,所提出的解调器在没有谐波失真的情况下工作,具有±180 kHz的频率偏移,在0.1%的误码率(BER)时仅需要SNR 18.5 dB,并且从1.8 V电源消耗的电流不超过0.26 mA。

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