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HASPRNG: Hardware Accelerated Scalable Parallel Random Number Generators

机译：HASPRNG：硬件加速的可扩展并行随机数生成器

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摘要

The Scalable Parallel Random Number Generators library (SPRNG) supports fast and scalable random number generation with good statistical properties for parallel computational science applications. In order to accelerate SPRNG in high performance reconfigurable computing systems, we present the Hardware Accelerated SPRNG library (HASPRNG). Ported to the Xilinx University Program (XUP) and Cray XD1 reconfigurable computing platforms, HASPRNG includes the reconfigurable logic for Field Programmable Cate Arrays (FPGAs) along with a programming interface which performs integer random number generation that produces identical results with SPRNG. This paper describes the reconfigurable logic of HASPRNG exploiting the mathematical properties and data parallelism residing in the SPRNG algorithms to produce high performance and also describes how to use the programming interface to minimize the communication overhead between FPGAs and microprocessors. The programming interface allows a user to be able to use HASPRNG the same way as SPRNG 2.0 on platforms such as the Cray XD1. We also describe how to install HASPRNG and use it. For HASPRNG usage we discuss a FPGA 7r-estimator for a High Performance Reconfigurable Computer (HPRC) sample application and compare to a software 7r-estimator. HASPRNG shows 1.7x speedup over SPRNG on the Cray XD1 and is able to obtain substantial speedup for a HPRC application.
机译：可扩展并行随机数生成器库（SPRNG）支持快速和可扩展随机数生成，具有良好的统计属性，适用于并行计算科学应用。为了在高性能可重构计算系统中加速SPRNG，我们提供了硬件加速SPRNG库（HASPRNG）。 HASPRNG移植到Xilinx大学计划（XUP）和Cray XD1可重配置计算平台上，它包括用于现场可编程门阵列（FPGA）的可重配置逻辑以及一个编程接口，该接口执行整数随机数生成，该生成与SPRNG产生相同的结果。本文介绍了利用SPRNG算法中的数学特性和数据并行性来产生高性能的HASPRNG可重配置逻辑，并描述了如何使用编程接口来最大程度地减少FPGA与微处理器之间的通信开销。编程界面使用户能够在Cray XD1等平台上以与SPRNG 2.0相同的方式使用HASPRNG。我们还将介绍如何安装和使用HASPRNG。对于HASPRNG的使用，我们讨论了适用于高性能可重构计算机（HPRC）示例应用程序的FPGA 7r估计器，并将其与软件7r估计器进行比较。 HASPRNG在Cray XD1上显示出比SPRNG快1.7倍的速度，并且能够为HPRC应用获得实质性的提速。

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