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首页> 外文期刊>Journal of Physics, D. Applied Physics: A Europhysics Journal >Intrinsic limits of channel transport hysteresis in graphene-SiO2 interface and its dependence on graphene defect density
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Intrinsic limits of channel transport hysteresis in graphene-SiO2 interface and its dependence on graphene defect density

机译：石墨烯-SiO2界面中沟道输运滞后的固有极限及其对石墨烯缺陷密度的依赖性

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摘要

Hysteresis in channel conductance is commonly observed on graphene field effect transistors. Although consistent and repeatable hysteresis could possibly be attractive for memory based applications, it is detrimental to the deployment of graphene in high speed electronic switches. While the origin of such hysteresis has been variously attributed to graphene-insulator interface traps, adsorbed molecules and bulk charges in the dielectric, its dependence on the quality of the graphene has been largely unexplored. Since, CVD is the most promising synthesis route for large area graphene and defects in such a growth process are inevitable, it is important to understand the influence of the quality of graphene on hysteresis. Here we demonstrate, for the first time, the effect of graphene growth defect density on device hysteresis. By intentionally tailoring the defect densities in the growth phase, we demonstrate a linear correlation between the film defect density and conductance hysteresis. The trap charge density calculated from the observed hysteresis in the electrical transfer characteristics was found to both follow the same qualitative trend, and give reasonable quantitative agreement with the defect density as extracted from Raman spectroscopy. Most importantly, by extrapolation from the observed behavior, we identify the intrinsic limits of hysteresis in graphene-SiO2 system, demonstrating that the defects in graphene contribute to traps over and above the baseline set by the SiO2 surface trap charge density.
机译：通常在石墨烯场效应晶体管上观察到通道电导的滞后现象。尽管一致的和可重复的磁滞可能对基于存储器的应用很有吸引力，但它不利于在高速电子开关中部署石墨烯。尽管这种迟滞的起源已被不同程度地归因于石墨烯-绝缘体界面陷阱，电介质中吸附的分子和大量电荷，但很大程度上仍未探究其对石墨烯质量的依赖性。由于CVD是大面积石墨烯最有希望的合成途径，并且在这种生长过程中不可避免会出现缺陷，因此了解石墨烯质量对磁滞的影响非常重要。在这里，我们首次展示了石墨烯生长缺陷密度对器件滞后的影响。通过有意地调整在生长阶段的缺陷密度，我们证明了膜缺陷密度和电导滞后之间的线性关系。由观察到的电传输特性中的滞后计算出的陷阱电荷密度都遵循相同的定性趋势，并且与从拉曼光谱中提取的缺陷密度具有合理的定量一致。最重要的是，通过从观察到的行为进行推断，我们确定了石墨烯-SiO 2系统中磁滞的固有极限，表明石墨烯中的缺陷会导致陷阱超出SiO 2表面陷阱电荷密度所设定的基线。

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