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首页> 外文期刊>Nanotechnology >Pixel-based biosensor for enhanced control: silicon nanowires monolithically integrated with field-effect transistors in fully depleted silicon on insulator technology
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Pixel-based biosensor for enhanced control: silicon nanowires monolithically integrated with field-effect transistors in fully depleted silicon on insulator technology

机译：基于像素的生物传感器，用于增强控制：硅纳米线与现场效应晶体管整体集成在绝缘技术上的完全耗尽硅

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摘要

Silicon nanowires (SiNWs) are a widely used technology for sensing applications. Complementary metal-oxide-semiconductor (CMOS) integration of SiNWs advances lab-on-chip (LOC) technology and offers opportunities for read-out circuit integration, selective and multiplexed detection. In this work, we propose novel scalable pixel-based biosensors exploiting the integration of SiNWs with CMOS in fully-depleted silicon-on-insulator technology. A detailed description of the wafer-scale fabrication of SiNW pixels using the CMOS compatible sidewall-transfer-lithography as an alternative to widely investigated time inefficient e-beam lithography is presented. Each 60 nm wide SiNWs sensor is monolithically connected to a control transistor and novel on-chip fluid-gate forming an individual pixel that can be operated in two modes: biasing transistor frontgate (V-G) or substrate backgate (V-BG). We also present the first electrical results of single N and P-type SiNW pixels. In frontgate mode, N and P-type SiNW pixels exhibit subthreshold slope (SS) approximate to 70-80 mV/dec and I-on/I-off approximate to 10(5). The N-type and P-type pixels have an average threshold voltage, Vth of -1.7 V and 0.85 V respectively. In the backgate mode, N and P-type SiNW pixels exhibit SS approximate to 100-150 mV/dec and I-on/I-off approximate to 10(6). The N and P-type pixels have an average V-th of 5 V and -2.5 V respectively. Further, the influence of the backgate and frontgate voltage on the switching characteristics of the SiNW pixels is also studied. In the frontgate mode, the Vth of the SiNW pixels can be tuned at 0.2 V for 1 V change in V-BG for N-type or at -0.2 V for -1 V change in V-BG for P-type pixels. In the backgate mode, it is found that for stable operation of the pixels, the V-G of the N and P-type transistors must be in the range 0.5-2.5 V and 0 V to -2.5 V respectively.
机译：硅纳米线（SINWS）是一种广泛使用的传感应用技术。 SINWS的互补金属 - 氧化物半导体（CMOS）集成推进了芯片上的实验室（LOC）技术，并为读出电路集成，选择性和多路复用检测提供了机会。在这项工作中，我们提出了新颖的可扩展像素的生物传感器，利用CMOS在全耗尽的绝缘技术中与CMOS集成。使用CMOS兼容侧壁传输光刻作为诸如广泛研究的时间低效电子束光刻的替代方案的SINW像素的详细描述。每个60nm宽的Sinws传感器通过单独地连接到控制晶体管和新型片上流体栅极，形成可以以两种模式操作的单独像素：偏置晶体管前板（V-G）或基板背盖（V-BG）。我们还介绍了单一N和P型Sinw像素的第一电气结果。在FrontGate模式下，N和P型SINW像素呈现亚阈值斜率（SS）近似为70-80mV / DEC，I-ON / I-OFF近似为10（5）。 n型和p型像素分别具有平均阈值电压，Vth为-1.7V和0.85V。在基板模式下，N和P型SINW像素呈现SS近似为100-150 MV / DEC和I-ON / I OFF近似为10（6）。 N和P型像素分别具有平均V-TH，其中5V和-2.5V。此外，还研究了基底门和前板电压对SINW像素的切换特性的影响。在前板模式中，SINW像素的Vth可以在0.2V调谐，对于P型像素的V-BG变化为0.2V，在V-BG中的V-BG变化为-1V变化。在基板模式下，发现对于像素的稳定操作，N和P型晶体管的V-G必须分别为0.5-2.5V和0V至-2.5V。

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