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Quantitative analysis of charge trapping and classification of sub-gap states in MoS2 TFT by pulse I-V method

机译：脉冲I-V法测量分析MOS2 TFT中子间隙状态的分类和分类

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摘要

The threshold voltage instabilities and huge hysteresis of MoS2 thin film transistors (TFTs) have raised concerns about their practical applicability in next-generation switching devices. These behaviors are associated with charge trapping, which stems from tunneling to the adjacent trap site, interfacial redox reaction and interface and/or bulk trap states. In this report, we present quantitative analysis on the electron charge trapping mechanism of MoS2 TFT by fast pulse I-V method and the space charge limited current (SCLC) measurement. By adopting the fast pulse I-V method, we were able to obtain effective mobility. In addition, the origin of the trap states was identified by disassembling the sub-gap states into interface trap and bulk trap states by simple extraction analysis. These measurement methods and analyses enable not only quantitative extraction of various traps but also an understanding of the charge transport mechanism in MoS2 TFTs. The fast I-V data and SCLC data obtained under various measurement temperatures and ambient show that electron transport to neighboring trap sites by tunneling is the main charge trapping mechanism in thin-MoS2 TFTs. This implies that interfacial traps account for most of the total sub-gap states while the bulk trap contribution is negligible, at approximately 0.40% and 0.26% in air and vacuum ambient, respectively. Thus, control of the interface trap states is crucial to further improve the performance of devices with thin channels.
机译：阈值电压不稳定性和MOS2薄膜晶体管（TFT）的巨大滞后提出了对下一代开关装置中的实际适用性的担忧。这些行为与电荷捕获有关，其源于隧道到相邻的陷阱部位，界面氧化还原反应和界面和/或散装捕集状态。在本报告中，我们通过快速脉冲I-V方法和空间电荷有限电流（SCLC）测量来呈现MOS2 TFT的电子电荷捕获机制的定量分析。通过采用快速脉冲I-V方法，我们能够获得有效的移动性。此外，通过简单的提取分析将子间隙状态拆卸到界面陷阱和散装阱状态，通过简单的提取分析来识别陷阱状态的来源。这些测量方法和分析不仅能够对各种陷阱进行定量提取，而且可以理解MOS2 TFT中的电荷传输机制。在各种测量温度和环境下获得的快速I-V数据和SCLC数据表明，通过隧道的相邻陷阱部位的电子传输是薄MOS2 TFT中的主电荷捕获机构。这意味着对于大多数总子间隙状态的界面陷阱分别忽略于空气和真空环境中的大约0.40％和0.26％。因此，对界面陷阱状态的控制对于进一步提高具有薄通道的装置的性能至关重要。

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