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Analysis of noise generation and electric conduction at grain boundaries in CVD-grown MoS2 field effect transistors

机译：CVD生长MOS2场效应晶体管晶界噪声产生与导通分析

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摘要

Grain boundaries in a chemical vapour deposition (CVD)-grown monolayer of MoS2 induce significant effects on the electrical and low frequency noise characteristics of the MoS2. Here, we investigated the electrical properties and noise characteristics of MoS2 field effect transistors (FETs) made with CVD-grown monolayer MoS2. The electrical and noise characteristics of MoS2 FETs were analysed and compared for the MoS2 channel layers with and without grain boundaries. The grain boundary in the CVD-grown MoS2 FETs can be the dominant noise source, and dependence of the extracted Hooge parameters on the gate voltage indicated the domination of the correlated number-mobility fluctuation at the grain boundaries. The percolative noise characteristics of the single grain regions of MoS2 were concealed by the noise generated at the grain boundary. This study can enhance understanding of the electrical transport hindrance and significant noise generation by trapped charges at grain boundaries of the CVD-grown MoS2 devices.
机译：化学气相沉积中的晶界（CVD）-Blown单层MOS2对MOS2的电气和低频噪声特性引起显着影响。在这里，我们研究了用CVD生长的单层MOS2制成的MOS2场效应晶体管（FET）的电性能和噪声特性。分析MOS2 FET的电气和噪声特性，并将MOS2通道层与具有晶界的MOS2通道层进行分析。 CVD-生长MOS2 FET中的晶界可以是显性噪声源，并且提取的Hooge参数对栅极电压的依赖性指示在晶界处的相关数迁移率波动的占状。通过在晶界处产生的噪声隐藏MOS2的单粒区域的渗透噪声特性。该研究可以通过在CVD生长MOS2器件的晶界处通过捕获的电荷提高对电气传输障碍和显着噪声的理解。

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