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首页> 外文期刊>ACM Transactions on Design Automation of Electronic Systems >Compiler-in-the-Loop Exploration During Datapath Synthesis for Higher Quality Delay-Area Trade-offs
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Compiler-in-the-Loop Exploration During Datapath Synthesis for Higher Quality Delay-Area Trade-offs

机译：数据路径综合期间的编译器在环探索，以实现更高质量的延迟区域权衡

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摘要

Design space exploration during high-level synthesis targets the computation of those design solutions which form optimal trade-off points. This quest for optimal trade-offs has been focused on studying the impact of various architectural-level parameters during high-level synthesis algorithms, silently neglecting the tradeoffs produced from the combined impact of behavioral-level together with architectural-level parameters. We propose a novel design space, exploration methodology that studies an extended instance of the solution space considering the effects of combining compiler- and architectural-level transformations. It is shown that exploring the design space in a global manner reveals new trade-off points, thus shifting towards higher quality design solutions. We use a combination of upper-bounding conditions together with gradient-based heuristic pruning to efficiently traverse the extended search space. Our exploration framework delivers significant quality improvements without compromising the optimality (Pareto accuracy) of the discovered solutions, together with significant runtime reductions compared to exploring exhaustively the solution space at every allocation scenario.
机译：在高级综合过程中进行设计空间探索的目的是计算那些形成最佳折衷点的设计解决方案。对最佳权衡的追求一直集中在研究高级综合算法期间各种体系结构级参数的影响，而忽略了行为级影响与体系结构级参数的组合所产生的权衡。我们提出了一种新颖的设计空间，探索方法，该方法研究了解决方案空间的扩展实例，并考虑了将编译器级转换与体系结构级转换相结合的效果。结果表明，以全局方式探索设计空间揭示了新的权衡点，从而转向了更高质量的设计解决方案。我们结合使用上限条件和基于梯度的启发式修剪来有效地遍历扩展的搜索空间。与在每种分配方案下全面探索解决方案空间相比，我们的探索框架可在不损害发现的解决方案的最优性（帕累托准确性）的情况下提供显着的质量改进，并显着减少运行时间。

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