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首页> 外文期刊>Analog Integrated Circuits and Signal Processing >Linear in dB, sub 0.2 dB gain-step CMOS programmable gain amplifier for ultrasound applications
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Linear in dB, sub 0.2 dB gain-step CMOS programmable gain amplifier for ultrasound applications

机译：用于超声应用的DB中的线性，SUB 0.2 DB增益步骤CMOS可编程增益放大器

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摘要

In this paper a new approach for controlling the gain of a programmable gain amplifier (PGA) using an eight-bit digital word has been proposed. Eight stages of R-2R ladder attenuators have been employed for attenuating the input signal. The output of the ladder network feeds the nine gm stages as a part of the PGA. Making use of three MSB bits of the control word, at each instance just the two successive gm stages are active whose tail currents are precisely determined to set the PGA linear gain in dB. A current bank composed of 32 current sources has been used for driving the tail currents of the active gm stages. The current sources that bias the active gm stages are controlled by the five LSB bits of the digital control word. Thanks to the proposed technique, the values of the current sources are determined so that the gain of the circuit is based on a ratio-metric parameter making the circuit less sensitive to process variations. For verification of the proposed idea, a differential PGA is design in a 0.18 mu m 1.8 V CMOS technology. The gain of the designed circuit changes from 20.8 to -27.4 dB in 256 steps linearly in dB so that the maximum gain error respect to its ideal value is less than 0.03 dB in different corner cases. At the maximum gain, the bandwidth and the input referred noise voltage of the PGA are 150 MHz and 3.5 nv/root Hz, respectively, while the overall circuit draws 6 mA from a 1.8 V power supply.
机译：本文已经提出了一种使用八位数字词来控制可编程增益放大器（PGA）的增益的新方法。 R-2R梯形衰减器的八个阶段已经用于衰减输入信号。梯形网的输出作为PGA的一部分馈送九GM阶段。在每个实例中使用三个MSB位的控制单位只是两个连续的转基因阶段是有源的，其尾电流精确地确定在DB中设置PGA线性增益。由32个电流源组成的当前银行用于驱动活性通用阶段的尾部电流。偏置有源GM级的电流来源由数字控制字的五个LSB位控制。由于所提出的技术，确定电流源的值，使得电路的增益基于比率 - 度量参数，使电路不太敏感到处理变化。为了验证所提出的想法，差动PGA在0.18 mu m 1.8 V CMOS技术中设计。设计电路的增益在DB中线性地线性地从20.8到-27.4 dB变为256个步骤，使得在不同的角壳体中的最大增益误差达到其理想值小于0.03 dB。在最大增益处，PGA的带宽和输入参考噪声电压分别为150 MHz和3.5nV / Root Hz，而总电路从1.8 V电源抽取6 mA。

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