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首页> 外文期刊>Advanced Science Letters >Ethernet Interface of High Speed Data Acquisition System Based on ARM-FPGA
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Ethernet Interface of High Speed Data Acquisition System Based on ARM-FPGA

机译：基于ARM-FPGA的高速数据采集系统的以太网接口

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摘要

For acquiring the data from a digital signal processor (DSP) with eight independent synchronous serial ports (SPORTs) and transporting the data by Ethernet, the hardware structure of Ethernet interface of high speed data acquisition system is designed based on integration of ARM and FPGA, of which the FPGA is mounted as a peripheral memory of ARM. The SPORTs module and the FIFO module in the FPGA are analyzed and constructed. Meanwhile, the FPGA device driver is designed in the embedded Linux, and the network service program for remote client is composed, in which, according to the remote client setting request on the acquiring system as well as the data transporting, two types of particular application protocols have been designed. At last, the experiment has been executed and the result demonstrates that the whole system works stably and the maximal data transporting speed via Ethernet interface comes up to 18.6 Mbit/S.
机译：为了从具有八个独立同步串行端口（SPORT）的数字信号处理器（DSP）采集数据并通过以太网传输数据，基于ARM和FPGA的集成设计了高速数据采集系统的以太网接口的硬件结构，其中FPGA被安装为ARM的外围存储器。对FPGA中的SPORTs模块和FIFO模块进行了分析和构建。同时，在嵌入式Linux系统中设计了FPGA设备驱动程序，构成了远程客户端的网络服务程序，其中，根据采集系统上远程客户端的设置请求以及数据的传输，两种特定的应用设计了协议。最后进行了实验，结果表明整个系统工作稳定，通过以太网接口的最大数据传输速度达到了18.6 Mbit / S。

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