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Chip firing and all-terminal network reliability bounds

机译:芯片射击和全终端网络可靠性界限

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摘要

The (all-terminal) reliability of a graph G is the probability that all vertices are in the same connected component, given that vertices are always operational but edges fail independently each with probability p. Computing reliability is #P-complete, and hence is expected to be intractable. Consequently techniques for efficiently (and effectively) bounding reliability have been the major thrust of research in the area. We utilize a deep connection between reliability and chip firings on graphs to improve previous bounds for reliability.
机译:图G的(全终端)可靠性是所有顶点在同一连接的组件中的概率,因为顶点始终是可操作的,但边缘独立地失败,每个概率p独立地失败。 计算可靠性是#p-truess,因此预计将是棘手的。 因此,有效地(有效地)限定可靠性的技术已经是该地区的主要研究推力。 我们利用图形上的可靠性和芯片射击之间的深度联系,以改善以前的可靠性界限。

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