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首页> 外文期刊>Journal of Low Power Electronics >Low-Complexity and Reconfigurable Discrete Hilbert Transform Architecture Design Methodology
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Low-Complexity and Reconfigurable Discrete Hilbert Transform Architecture Design Methodology

机译：低复杂性和可重构离散的离散希尔伯特变换架构设计方法

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摘要

In this paper, we propose an architecture design methodology for Discrete Hilbert Transform targeting the emerging real-time applications such as Cyber-Physical systems, Internet of Things and Remote Health Monitoring where the same chip-set needs to be used for various purposes underthe resource constrained scenario. To arrive at a low complexity and reconfigurable architecture, the proposed architecture exploits the similarity in nature of computation which uses only a single core element recursively. The proposed architecture and state of art architecture are codedin VHDL for 16 bit word length and ASIC implementation has been done at UMC 90 nm technology @VDD = 1 V and @1 MHZ clock frequency. Comprehensive theoretical analysis, architecture implementation and experimental comparison results show that the proposed design saves 59.75%, 58.70% and 57.27%on chip area and 84.32%, 83.01% and 82.76% power consumption when compared to the state of the art method for N = 32, 64 and 128 respectively. Furthermore the proposed architecture works for N = 2m point irrespective of m being an odd or even integer, where thestate of art architecture fails to perform for m being odd integer.
机译：在本文中，我们提出了一种用于离散的Hilbert变换的架构设计方法，其针对网络物理系统，物联网和远程健康监控等新出现的实时应用，其中相同的芯片组需要用于资源下的各种目的受限的情景。为了达到低复杂性和可重新配置的架构，所提出的架构利用计算性质的相似性，其仅递归仅使用单个核心元素。所提出的架构和最先进的架构是用于16位字长度的CodedIn VHDL，并且已经在UMC 90 NM技术@VDD = 1 V和@ 1MHz时钟频率下完成了ASIC实现。综合理论分析，架构实施和实验比较结果表明，与 n = 32,64和128分别。此外，所提出的体系结构适用于 n = 2 m点，而不管 m是一个奇数甚至整数，那么艺术架构的istate无法对 m为奇数整数而执行。

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