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Modeling of Dual Gate Material Hetero-dielectric Strained PNPN TFET for Improved ON Current

机译:双栅极材料杂电介质应变PNPN TFET改进电流的建模

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The tunnel field effect transistor (TFET) is considered to be a promising alternative device for future low-power VLSI circuits due to its steep subthreshold slope, low leakage current and its efficient performance at low supply voltage. However, the main challenging issue associated with realizing TFET for wide scale applications is its low ON current. To overcome this, a dual gate material with the concept of dielectric engineering has been incorporated into conventional TFET structure to tune the tunneling width at source–channel interface allowing significant flow of carriers. In addition to this, N+ pocket is implanted at source–channel junction of the proposed structure and the effect of strain is added for exploring the performance of the model in nanoscale regime. All these added features upgrade the device characteristics leading to higher ON current, low leakage and low threshold voltage. The present work derives the surface potential, electric field expression and drain current by solving 2D Poisson’s equation at different boundary conditions. A comparative analysis of proposed model with conventional TFET has been done to establish the superiority of the proposed structure. All analytical results have been compared with the results obtained in SILVACO ATLAS device simulator to establish the accuracy of the derived analytical model.
机译:隧道场效应晶体管(TFET)被认为是未来低功率VLSI电路的有希望的替代装置,由于其陡峭的亚阈值斜坡,低漏电流和其在低电源电压下的有效性能。然而,与实现宽度应用的TFET相关的主要具有挑战性问题是它的电流低。为了克服这一点,已经将具有介电工程概念的双栅极材料结合到传统的TFET结构中以在源通道界面处调谐隧道宽度,允许载流子的大量流动。除此之外,N +口袋在所提出的结构的源通道结处植入,并添加了应变的效果来探索纳米级制度的模型的性能。所有这些添加的功能升级了导致电流,低泄漏和低阈值电压更高的设备特性。通过在不同边界条件下求解2D泊松等式,本作所在的表面电位,电场表达和漏极电流。已经进行了对具有传统TFET的提出模型的对比分析,以确定所提出的结构的优越性。将所有分析结果与Silvaco Atlas设备模拟器中获得的结果进行了比较,以确定导出的分析模型的准确性。

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