Impact of gate fan-in and fan-out limits on optoelectronic digital circuits

Lianhua Ji; V. P. Heuring

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Impact of gate fan-in and fan-out limits on optoelectronic digital circuits

机译：栅极扇入和扇出限制对光电数字电路的影响

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The impact of gate fan-in and fan-out limits on digital circuit delay is discussed with a set of benchmark circuits. This research presents the advantages of exploiting the ability of optoelectronic gates to perform both logic operations and optical interconnections with systematic optimization. It is possible for gate-level optical interconnected optoelectronic circuits to compete with their pure silicon counterparts in terms of the combinational circuit delay and system clock rate. # 1997 Optical Society of America

机译：利用一组基准电路讨论了门扇入和扇出限制对数字电路延迟的影响。这项研究提出了利用光电门通过系统优化来执行逻辑运算和光学互连的能力的优势。栅极级光互连光电电路有可能在组合电路延迟和系统时钟速率方面与它们的纯硅同类产品竞争。＃1997美国眼镜学会

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《Applied optics》 |1997年第18期|共14页
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Lianhua Ji; V. P. Heuring;
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1. Impact of gate fan-in and fan-out limits on optoelectronic digital circuits [J] . Lianhua Ji, V. P. Heuring Applied optics . 1997,第16a18期

机译：栅极扇入和扇出限制对光电数字电路的影响
2. Fast $V_{rm th}$ Instability in $hbox{HfO}_{2}$ Gate Dielectric MOSFETs and Its Impact on Digital Circuits [J] . Shen C., Yang T., Li M.-F., IEEE Transactions on Electron Devices . 2006,第期

机译：$ hbox {HfO} _ {2} $栅极介电MOSFET的快速$ V_ {rm th} $不稳定性及其对数字电路的影响
3. Fast $V_{rm th}$ Instability in $hbox{HfO}_{2}$ Gate Dielectric MOSFETs and Its Impact on Digital Circuits [J] . Chen Shen, Tian Yang, Ming-Fu Li, IEEE Transactions on Electron Devices . 2006,第12期

机译：$ hbox {HfO} _ {2} $栅极介电MOSFET的快速$ V_ {rm th} $不稳定性及其对数字电路的影响
4. Impact of multi-gate device architectures on digital and analog circuits and its implications on System-On-Chip technologies [C] . Thean A., Wambacq P., Lee J.W., IEEE International Electron Devices Meeting . 2013

机译：多栅极设备架构对数字和模拟电路的影响及其对片上系统技术的影响
5. A Satisfiability Algorithm for Constant Depth Boolean Circuits with Unbounded Fan-In Gates. [D] . Matthews, William G. 2011

机译：具有无限扇入门的恒定深度布尔电路的可满足性算法。
6. Digital logic circuits in yeast with CRISPR-dCas9 NOR gates [O] . Miles W. Gander, Justin D. Vrana, William E. Voje, -1

机译：具有CRISPR-dCas9或非门的酵母中的数字逻辑电路
7. Impact of systematic spatial intra-chip gate length variability on performance of high-speed digital circuits [O] . Michael Orshansky, Linda Milor, Pinhong Chen, 2015

机译：系统空间片内栅极长度变化对高速数字电路性能的影响
8. Dynamically Programmable Self-Aligning Optical Interconnect with Fan-Out and Fan-In Using Self-Pumped Phase Conjugation. [R] . Cronin-Golomb, M. 1989

机译：采用自泵相位共轭的动态可编程自对准光纤互连，具有扇出和扇入。

Impact of gate fan-in and fan-out limits on optoelectronic digital circuits

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