首页> 美国政府科技报告 >Ultra-High Performance Architecture for Embedded Defense Signal and Image Processing Applications

【24h】

Ultra-High Performance Architecture for Embedded Defense Signal and Image Processing Applications

机译：用于嵌入式防御信号和图像处理应用的超高性能架构

获取原文

页面导航

摘要
著录项
相似文献
相关主题

摘要

This briefing describes the development of a novel, ultra-high performance next-generation Single-Instruction/Multiple-Data (SIMD) processing architecture originally designed to realize immersive, photo-realistic 3-D simulations. This low-power, Multi-Threaded Array Processor (MTAP) architecture provides for hundreds and ultimately thousands of processing elements, each with optional floating point hardware, to perform data parallel processing on image and signal processing applications as well as for compression, encryption, search, and general sensor processing applications. The technology is supported by a flexible development environment, including assembly language and C-based language support, as well as a cycle accurate simulator, with plans to develop industry standard API Libraries based upon VSIPL and, ultimately, HPEC-SI. This new technology, being developed by WorldScape and ClearSpeed, has been shown to provide ten to one hundred times the overall performance of PowerPC or Pentium- based architectures, especially when performing image and signal processing functions, such as FFTs or filters. In general, the architecture has been shown to provide significant throughput, size, and power advantages for embedded processing applications.

著录项

作者
Reddaway, S. ; Rogina, P. ; Cameron, K. ; McIntosh-Smith, S. ; Stuttard, D.;
展开▼
作者单位

展开▼
年度 2003
页码 1-34
总页数 34
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
Signal processing; Image processing; Defense systems; Architecture; Computer benchmarking; Simulators; Detectors; Cryptography; Parallel processing; Embedding; Fast fourier transforms; Filters; Floating point operation; Pulse compression; Workshops; Assembly languages; C programming language;

机译：信号处理;图像处理;国防系统;架构;计算机基准测试;模拟器;探测器;密码学;并行处理;嵌入;快速傅立叶变换;滤波器;浮点运算;脉冲压缩;工作坊;汇编语言; C编程语言;

相似文献

外文文献
中文文献
专利

1. Concurrent VLSI architectures for image and signal processing: Applications in image and signal processing [J] . Nash J.Greg Potentials, IEEE . 1986,第2期

机译：图像和信号处理的并行VLSI体系结构：图像和信号处理中的应用
2. Dynamically Reconfigurable Embedded Architecture-An Alternative To Application-Specific Digital Signal Processing Architectures | Science Publications [J] . J. R.P. Perinbam, N. Ramadass, S. Natarajan Journal of computer sciences . 2007,第10期

机译：动态可重新配置的嵌入式体系结构-替代特定于应用的数字信号处理体系结构|科学出版物
3. A dependable high performance wafer scale architecture for embedded signal processing [J] . Linderman R.W., Kohler R.L.R. IEEE Transactions on Computers . 1998,第1期

机译：用于嵌入式信号处理的可靠的高性能晶圆级架构
4. A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications [C] . Hong Yue, Kui Dai, Zhiying Wang International Conference on Embedded Systems and Applications . 2006

机译：用于多媒体信号处理应用的双核嵌入式系统片上架构
5. Novel reconfigurable computing architectures for embedded high performance signal processing and numerical applications. [D] . Ortiz Gual, Fernando Enrique. 2006

机译：用于嵌入式高性能信号处理和数值应用的新型可重构计算架构。
6. A Python-based laboratory course for image and video signal processing on embedded systems [O] . Karina Jaskolka, Jürgen Seiler, Frank Beyer, 2019

机译：基于Python的实验室课程用于嵌入式系统上的图像和视频信号处理
7. Dynamically Reconfigurable Embedded Architecture-An Alternative To Application-Specific Digital Signal Processing Architectures [O] . N. Ramadass, S. Natarajan, J. Raja, 2008

机译：动态可重配置嵌入式架构 - 特定于应用的数字信号处理架构的替代方案

Ultra-High Performance Architecture for Embedded Defense Signal and Image Processing Applications

摘要

著录项

相似文献

相关主题

期刊订阅