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FLAG HOLDING CIRCUIT AND FLAG HOLDING METHOD
FLAG HOLDING CIRCUIT AND FLAG HOLDING METHOD
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机译：持旗电路及持旗方法
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摘要
PROBLEM TO BE SOLVED: To provide a flag holding circuit capable of holding a flag for a certain period, with or without power supply.;SOLUTION: A flag holding circuit has a first capacitor having one end connected with a first line, and the other grounded end, a flag setting part for charging the first capacitor in response to an input signal, a flag determination unit outputting an output signal representative of 0 or 1 on the basis of charging voltage of the first capacitor, and a discharger for discharging the first capacitor. The discharger includes a transconductance element for discharging the first capacitor via the first line, a control switch receiving voltage supply of a second line, between the flag determination unit and the discharger, at the control end, and a second capacitor having one end connected with a node between the control input end of the transconductance element and the control switch, and the other grounded end. The flag determination unit outputs the inversion voltage of the first line to the second line.;SELECTED DRAWING: Figure 2;COPYRIGHT: (C)2020,JPO&INPIT
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