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Method of interconnect for high density 2.5D and 3D integration

机译:用于高密度2.5D和3D集成的互连方法

摘要

Methods and apparatus are described to enable copper-copper (Cu-Cu) bonding at reduced temperatures (eg, at most 200 ° C.) by significantly reducing Cu oxide formation. These techniques provide faster cycle times and do not involve special measures (eg forming gas). Such techniques may also allow longer queue (Q) or staging times. One exemplary semiconductor structure (100) is generally a semiconductor layer (102), an adhesive layer (104) disposed over the semiconductor layer (102), and a metal disposed over the adhesive layer (104). A layer (106) and a cathode metal layer (108) disposed over the anode metal layer (106). The oxidation potential of the anode metal layer (106) may be higher than the oxidation potential of the cathode metal layer (108). Such a semiconductor structure (100) may be utilized in the manufacture of IC packages (300, 400) implementing 2.5D or 3D integration.
机译:描述了通过显着减少氧化铜的形成来在降低的温度(例如,至多200℃)下实现铜-铜(Cu-Cu)键合的方法和装置。这些技术提供了更快的循环时间,并且不涉及特殊措施(例如,形成气体)。这样的技术还可以允许更长的队列(Q)或暂存时间。一种示例性半导体结构(100)通常是半导体层(102),设置在半导体层(102)上方的粘合层(104)和设置在粘合层(104)上方的金属。层(106)和设置在阳极金属层(106)上方的阴极金属层(108)。阳极金属层(106)的氧化电势可以高于阴极金属层(108)的氧化电势。这种半导体结构(100)可以用于制造实现2.5D或3D集成的IC封装(300、400)。

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