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Method and apparatus for generating twenty-five percent duty cycle clock
Method and apparatus for generating twenty-five percent duty cycle clock
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机译：产生百分之二十五占空比时钟的方法和装置
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摘要
A clock generator and method operate by receiving an input clock; cascading a first inverter, a second inverter, a third inverter, and a fourth inverter in a ring topology to output a first phase, a second phase, a third phase, and a fourth phase of an interim clock; enabling the second inverter and the fourth inverter during a first phase of the input clock and enforcing a complementary relation between the second phase and the fourth phase of the interim clock by using a fifth inverter and a sixth inverter configured in a cross-coupling topology; enabling the first inverter and the third inverter during a second phase of the input clock and enforcing a complementary relation between the first phase and the third phase of the interim clock by using a seventh inverter and an eighth inverter configured in a cross-coupling topology.
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