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LOW PARASITIC CAPACITANCE AND RESISTANCE finFET DEVICE

机译:低寄生电容和电阻finFET器件

摘要

Described herein is a semiconductor structure and method of manufacture. The semiconductor structure includes a plurality of semiconductor fins on a substrate and a plurality of raised active regions, wherein each raised active region is located on sidewalls of a corresponding semiconductor fin among said plurality of semiconductor fins. The raised active regions are laterally spaced from any other of the raised active regions. Each raised active region comprises angled sidewall surfaces that are not parallel or perpendicular to a topmost horizontal surface of said substrate. The raised active regions are silicon germanium (SiGe). The semiconductor structure includes a metal semiconductor alloy region contacting at least said angled sidewall surfaces of at least two adjacent raised active regions. The semiconductor alloy region includes a material selected from the group consisting of nickel silicide, nickel-platinum silicide and cobalt silicide.
机译:本文描述了一种半导体结构及其制造方法。该半导体结构包括在衬底上的多个半导体鳍和多个凸起的有源区,其中每个凸起的有源区位于所述多个半导体鳍之中的相应的半导体鳍的侧壁上。凸起的有源区与任何其他凸起的有源区横向间隔开。每个凸起的有源区域包括成角度的侧壁表面,该成角度的侧壁表面不平行于或不垂直于所述衬底的最上水平表面。凸起的有源区是硅锗(SiGe)。半导体结构包括金属半导体合金区域,该金属半导体合金区域与至少两个相邻的凸起的有源区域的至少所述成角度的侧壁表面接触。半导体合金区域包括选自由硅化镍,硅化镍铂和硅化钴组成的组的材料。

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