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ENGINEERING OF FERROELECTRIC MATERIALS IN SEMICONDUCTOR DEVICES BY SURFACE POTENTIAL MODULATION

机译：表面电势调制技术在半导体器件中的铁电材料工程

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摘要

In semiconductor devices, high-k dielectric materials may be formed on the basis of engineered surface conditions, thereby contributing to superior uniformity of the resulting characteristics. In some illustrative embodiments, the dielectric material may be stabilized in a ferroelectric phase, wherein the previous surface modulation, which, in the illustrative embodiments may include the introduction of respective species, such as dopant species, thereby contributing to uniform ferroelectric characteristics. In some illustrative embodiments, the process strategy may be applied to a buried insulating layer of an SOI substrate.

机译：在半导体器件中，可以根据工程表面条件形成高k介电材料，从而有助于提高所得特性的均匀性。在一些说明性实施例中，介电材料可以被稳定在铁电相中，其中先前的表面调制在说明性实施例中可以包括引入相应的种类，例如掺杂剂种类，从而有助于均匀的铁电特性。在一些说明性实施例中，该工艺策略可以应用于SOI衬底的掩埋绝缘层。

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公开/公告号US2019108998A1

专利类型
公开/公告日2019-04-11

原文格式PDF
申请/专利权人 GLOBALFOUNDRIES INC.;
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申请/专利号US201715729815
发明设计人 LARS MUELLER-MESKAMP;STEFAN DUENKEL;
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申请日2017-10-11
分类号H01L21/02;H01L21/762;H01L29/78;H01L21/265;H01L21/223;H01L29/06;H01L29/66;
国家 US
入库时间 2022-08-21 12:10:12

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