首页> 外国专利> method for detecting misalignment of chips manufacturing method of fan-out panel level package using the same and fan-out panel level package

method for detecting misalignment of chips manufacturing method of fan-out panel level package using the same and fan-out panel level package

机译:芯片不对准的检测方法,使用该方法的扇出面板级封装和扇出面板级封装的制造方法

摘要

The present invention provides a method for detecting an alignment error of chips capable of detecting alignment errors of chips at a high speed, and a manufacturing method of a package using the same. The method comprises the following steps of: scanning a substrate and the chips, and obtaining images; obtaining absolute differences of reference chips with respect to the substrate in the images; obtaining relative differences of dependent chips in the images with respect to the reference chips; and calculating the alignment errors of the chips from the absolute differences and the relative differences.
机译:本发明提供了一种能够高速检测芯片​​的对准误差的,用于检测芯片的对准误差的方法,以及使用该方法的封装的制造方法。该方法包括以下步骤:扫描基板和芯片,并获得图像;以及在图像中获得参考芯片相对于基板的绝对差;获得图像中相关芯片相对于参考芯片的相对差异;根据绝对差和相对差计算出芯片的对准误差。

著录项

  • 公开/公告号KR20180010378A

    专利类型

  • 公开/公告日2018-01-31

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20160092142

  • 发明设计人 SOHN YOUNG HOON;YANG YU SIN;

    申请日2016-07-20

  • 分类号H01L21/66;H01L21/67;H01L21/68;H01L21/687;H01L23;H01L23/538;

  • 国家 KR

  • 入库时间 2022-08-21 12:40:56

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