首页>
外国专利>
Programmable logic device, method for verifying error of programmable logic device, and method for forming circuit of programmable logic device
Programmable logic device, method for verifying error of programmable logic device, and method for forming circuit of programmable logic device
展开▼
机译：可编程逻辑器件，用于验证可编程逻辑器件的错误的方法以及用于形成可编程逻辑器件的电路的方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
Arithmetic operation circuits and a verification circuit are formed by loading configuration information into a configuration memory in an FPGA. Arithmetic operation circuits have the same arithmetic operation function, but are different from each other in combination of the circuit blocks. The arithmetic operation circuits are formed by combining the circuit blocks to make the maximum use of the DSP block, while the arithmetic operation circuit is formed by combining the circuit blocks other than DSP block. The arithmetic operation circuits each are configured to use a block RAM as the data hold memory, while the arithmetic operation circuit is configured to use a distributed RAM as the data hold memory. Each of the arithmetic operation circuits receives the input data, and outputs arithmetic operation result data (V1 to V3). A verification circuit compares the arithmetic operation result data to verify whether errors occur.
展开▼
