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Assessment and verification of hardware requirements for multi-stage field programmable gate arrays in airborne electronic systems
Assessment and verification of hardware requirements for multi-stage field programmable gate arrays in airborne electronic systems
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机译:评估和验证机载电子系统中多级现场可编程门阵列的硬件要求
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摘要
A method of verifying a field programmable gate array (12) for use in an integrated system (18) includes selecting, from a set of requirements of the field programmable gate array (12), a first subset of the requirements that are not influenced by dynamics of the integrated system (18), selecting, from the set of requirements of the field programmable gate array (12), a second subset of the requirements that are influenced by the dynamics of the integrated system (18), executing a hardware test on the field programmable gate array (12) using a chip tester (28) that verifies the first subset of the requirements and executing a hardware test on the field programmable gate array (12) to verify the second subset of the requirements while the field programmable gate array (12) is installed within the integrated system (18).
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