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3D A METHOD FOR MICROVIA FILLING BY COPPER ELECTROPLATING WITH TSV TECHNOLOGY FOR 3D COPPER INTERCONNECTION AT HIGH ASPECT RATIO
3D A METHOD FOR MICROVIA FILLING BY COPPER ELECTROPLATING WITH TSV TECHNOLOGY FOR 3D COPPER INTERCONNECTION AT HIGH ASPECT RATIO
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机译：3D一种通过TSV技术电镀铜以高纵横比进行3D铜互连的微孔填充方法
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摘要
The present invention Step 1: Copper methyl sulfonate step of FIG manufacturing the amount of electricity system, step 2: step that through electroplating pre-wet the micro-via in the silicon through-electrode technique, Step 3: charged into the groove, and the post current complete spread, copper ions and additives are silicon micro-via surfaces and the steps are reasonably distributed in the interior of the through-electrode technique, step 4: connect the wafer for the silicon through-hole technology on the cathode (cathode) of the power source, electricity, sikimyeo fully immersed in the electroplating amount on the surface of the wafer, but by electroplating comprising a step-by-step amperometric rotating or stirring the cathode, the current density of the plating conditions are 0.01-10A / dm 2, the temperature is 15-30 ℃ step, step 5: After the electroplating, and washed completely clean the wafer with deionized water, bubble the step of rotating it, or blow drying Which relates to a method of filling micro-vias in high aspect ratio by a copper electroplating having a through-silicon electrode technology for the 3D interconnection of copper in. In high aspect ratio provided in the present invention method for microvia filling by copper electroplating having a silicon through electrode technique for 3D copper interconnection is high Via - has a filling (via-filling) speed, thin copper on the surface layer to have, there is a risk of voids (voids) and cracking, the hoop 10 for peeling: may obtain a complete filling of the micro via having an aspect ratio of 1 or more.;
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