Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator

• 1. 三维集成电路中具有自适应体偏置的时钟歪斜补偿 [P] . 中国专利： CN107210300B . 2020.10.27
• 2. 三维(3D)集成电路(IC)(3DIC)中具有自适应体偏置的时钟歪斜补偿 [P] . 中国专利： CN107210300A . 2017-09-26
• 3. Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator [P] . 美国专利： US10205461B2 . 2019-02-12

  机译： 具有包括注入锁定振荡器的时钟去歪斜电路的集成电路

• 4. INTEGRATED CIRCUIT HAVING A CLOCK DESKEW CIRCUIT THAT INCLUDES AN INJECTION-LOCKED OSCILLATOR [P] . 美国专利： US2018198455A1 . 2018-07-12

  机译： 集成电路具有时钟锁定电路，其中包括注入锁定振荡器

• 5. Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator [P] . 美国专利： US9564912B2 . 2017-02-07

  机译： 具有时钟去歪斜电路的集成电路，该时钟去歪斜电路包括注入锁定振荡器

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• 3. DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT [J] . Wang, Pengjun, Yu, 电子科学学刊：英文版 . 2007,第002期
• 4. Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits [J] . Pu Y., Zhang X., Ikeuchi K., Circuits and Systems II: Express Briefs, IEEE Transactions on . 2011,第5期
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• 10. Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits [O] . Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, 2015
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• 1. Creating Distinctive Connections between Multifunctional Microwave Circuits and Mobile-Terminal Radio-Frequency Integrated Chips Using Integrated Passive Device Technology [J] . Yongle Wu ,Mengdan Kong ,Zheng Zhuang . 中国通信 . 2021,第008期
• 2. The Role of Forced Oscillators of Coupled Circuits in Radiation Physics: New Linear Accelerator Design Improving Tomo-Scanning Technology (Radiotherapy and CT), Heisenberg-Euler Scatter, and Extension to Bremsstrahlung with GeV Electrons [J] . W. Ulmer . 应用数学与应用物理（英文） . 2021,第4期
• 3. 基于MEMS振荡器的高过载时钟电路设计与应用 [C] . 王敬斌 ,王丹 ,姜琦 . 中国兵工学会第十八届引信学术年会 . 2013
• 4. 6.25Gb/s时钟数据恢复电路与锁定指标电路设计 [A] . 杨林成 . 2012