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METHOD AND DEVICE FOR PREDICTING RELIABILITY FAILURE RATE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SEMICONDUCTOR INTEGRATED CIRCUIT
METHOD AND DEVICE FOR PREDICTING RELIABILITY FAILURE RATE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SEMICONDUCTOR INTEGRATED CIRCUIT
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机译：预测半导体集成电路可靠性故障率的方法和装置以及制造半导体集成电路的方法
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摘要
A method for predicting a failure rate of a semiconductor integrated circuit includes receiving a circuit netlist corresponding to circuit defining data, which defines a connection relation, input, output, size, type and operating temperature of each of a plurality of transistors included in the semiconductor integrated circuit. Low-risk transistors having a low-failure probability among the plurality of transistors are detected and filtered out based on the circuit netlist. Failure rates are calculated of respective high-risk transistors other than the low-risk transistors among the plurality of transistors. A total failure rate of the semiconductor integrated circuit is calculated based on the failure rates of the respective high-risk transistors.
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