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Executing unpack instruction and pack instruction with saturation on packed data elements from two source operand registers

机译:对来自两个源操作数寄存器的打包数据元素执行饱和时的解压缩指令和打包指令

摘要

A processor of an aspect includes a register file including a first register to hold a first packed data including a first low data element and a first high data element, a second register to hold a second packed data including a second low data element and a second high data element, and a third register. The processor also includes a decoder to decode an unpack instruction. The processor also includes a functional unit coupled with the decoder and the register file. The functional unit, in response to the decoder decoding the unpack instruction, is to transfer the first low data element to a high position of the third register and the second low data element to a low position of the third register.
机译:一个方面的处理器包括寄存器文件,该寄存器文件包括:第一寄存器,用于保存包括第一低数据元素和第一高数据元素的第一打包数据;第二寄存器,用于保存包括第二低数据元素和第二数据的第二打包数据。高数据元素和第三个寄存器。处理器还包括解码器,用于解码解压缩指令。处理器还包括与解码器和寄存器文件耦合的功能单元。响应于解码器解码解压缩指令,功能单元将第一低数据元素传送到第三寄存器的高位置,并且将第二低数据元素传送到第三寄存器的低位置。

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