首页> 外国专利> STRUCTURES AND CONTROL PROCESSES FOR EFFICIENT GENERATION OF DIFFERENT TEST CLOCKING SEQUENCES, CONTROLS AND OTHER TEST SIGNALS IN SCAN DESIGNS WITH MULTIPLE PARTITIONS, AND DEVICES, SYSTEMS AND PROCESSES OF MAKING

STRUCTURES AND CONTROL PROCESSES FOR EFFICIENT GENERATION OF DIFFERENT TEST CLOCKING SEQUENCES, CONTROLS AND OTHER TEST SIGNALS IN SCAN DESIGNS WITH MULTIPLE PARTITIONS, AND DEVICES, SYSTEMS AND PROCESSES OF MAKING

机译:在具有多个分区的扫描设计以及设备,系统和过程中高效生成不同测试时钟序列,控件和其他测试信号的结构和控制过程

摘要

A scannable integrated circuit (100) including a functional integrated circuit (P1, P2) having scan chains, multiple scan decompressors (120.1, 120.2), each operable to supply scan bits to some of the scan chains (101.k, 102.k), a shared scan-programmable control circuit (110, 300), a tree circuit (400) coupled with the functional integrated circuit (P1, P2), the shared scan-programmable control circuit (110, 300) coupled to control the tree circuit (400), and a selective coupling circuit (180) operable to provide selective coupling with the shared scan-programmable control circuit (110, 300) for scan programming through any of the multiple scan decompressors (120.1, 120.2). Other circuits, devices, systems, and processes of operation and manufacture are disclosed.
机译:一种可扫描集成电路( 100 ),包括具有扫描链的功能集成电路(P1,P2),多个扫描解压缩器( 120.1、120.2 ),每个可操作来提供扫描位到某些扫描链( 101。 k ,102。 k ),是一个共享的扫描可编程控件电路( 110,300 ),与功能集成电路(P1,P2)耦合的树形电路( 400 ),共享扫描可编程控制电路( 110、300 )耦合以控制树形电路( 400 ),以及选择性耦合电路( 180 )可用于与共享扫描-可编程控制电路( 110,300 ),用于通过多个扫描解压缩器( 120.1,120.2 )中的任何一个进行扫描编程。公开了其他电路,装置,系统以及操作和制造的过程。

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