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ESD PROTECTION FOR HIGH-VOLTAGE-TOLERANCE OPEN-DRAIN OUTPUT PAD
ESD PROTECTION FOR HIGH-VOLTAGE-TOLERANCE OPEN-DRAIN OUTPUT PAD
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机译：耐高压开漏输出焊盘的ESD保护
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摘要
A high-voltage NMOS transistor for ESD protection is coupled between a high-voltage I/O pad and a low-voltage terminal, and has a parasitic component between its source and drain. A trigger has an input coupled to the high-voltage I/O pad and an output coupled to the parasitic component. When the voltage on the high-voltage I/O pad raises above a threshold value, the trigger applies a voltage to trigger the parasitic component, so as to release an ESD current from the high-voltage I/O pad to the low-voltage terminal through the high-voltage NMOS transistor.
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