首页> 外国专利> The address belt breakdown central processing unit, address belt breakdown treatment manner, being the address belt breakdown treatment program and address belt breakdown central processing unit which

The address belt breakdown central processing unit, address belt breakdown treatment manner, being the address belt breakdown treatment program and address belt breakdown central processing unit which

机译:地址带故障集中处理单元,地址带故障处理方式,是地址带故障处理程序和地址带故障集中处理单元,

摘要

Inspecting the address line where the divergence address line which diverges from the subordinate address line which is connected to the subordinate bit other than particular superior bit to the superior address line which is connected to the superior bit of memory, respectively is connected, changes either input from the superior address line and input from the aforementioned divergence address line has the address line alternative circuit which is output to the superior bit, is connected every bit, when the breakdown address line specifies, replacing to the superior address line, in order to change to the divergence address line which diverges from the particular breakdown address line, by the fact that it makes the indication to the address line alternative circuit, memoryDecrease of the substantial memory capacity by memory degeneracy even with when breakdown occurs in the address line is evaded.
机译:检查从连接到除特定上位以外的从属位的下位地址线到分别连接至存储器的上位的上位地址线的发散地址线连接的地址线,改变输入来自上位地址线的输入和来自上述发散地址线的输入具有输出到上位的地址线替代电路,每一位都连接,当击穿地址线指定时,替换成上位地址线,以便改变相对于从特定击穿地址线发散的发散地址线,通过向地址线备用电路做出指示的事实,即使在地址线中发生击穿的情况下,由于存储器的退化,memory减小了显着的存储容量。

著录项

  • 公开/公告号JP4893746B2

    专利类型

  • 公开/公告日2012-03-07

    原文格式PDF

  • 申请/专利权人 富士通株式会社;

    申请/专利号JP20080540869

  • 发明设计人 鈴木 賢司;

    申请日2006-10-27

  • 分类号G06F12/16;

  • 国家 JP

  • 入库时间 2022-08-21 17:35:35

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号