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SoC DEVICE VERIFICATION MODEL USING MEMORY INTERFACE, CAPABLE OF CONTROLLING OR CONFIRMING THE EXTERNAL IP VERIFICATION MODEL BY A MEMORY CONTROLLER
SoC DEVICE VERIFICATION MODEL USING MEMORY INTERFACE, CAPABLE OF CONTROLLING OR CONFIRMING THE EXTERNAL IP VERIFICATION MODEL BY A MEMORY CONTROLLER
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机译:使用内存接口的SoC器件验证模型,能够通过内存控制器控制或确认外部IP验证模型
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摘要
PURPOSE: An SoC device verification model using memory interface is provided to interlink the IP of the SoC device model and external IP verification model using common interface.;CONSTITUTION: An SoC device model(310) comprises IP and memory controller. An external internet protocol verification model(320) effects an inspection of evidence IP included according to the command received from the SoC device model in the SoC device model. A bus selection model(330) selects the external IP verification model or external memory(340) in response to the memory control signal inputted from the memory controller of the SoC device mode.;COPYRIGHT KIPO 2010
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