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METHOD FOR GENERATING HIGH SPEED COMMAND SIGNAL AND HIGH SPEED ADDRESS SIGNAL FOR HIGH SPEED TEST AND SYSTEM ADAPTED TO THE SAME AND METHOD FOR GENERATING HIGH SPEED TEST PATTERN AND APPARATUS ADAPTED TO THE SAME
METHOD FOR GENERATING HIGH SPEED COMMAND SIGNAL AND HIGH SPEED ADDRESS SIGNAL FOR HIGH SPEED TEST AND SYSTEM ADAPTED TO THE SAME AND METHOD FOR GENERATING HIGH SPEED TEST PATTERN AND APPARATUS ADAPTED TO THE SAME
A method and an apparatus for generating a high-speed command signal and a high-speed address signal for a high-speed test, and a method and a system for generating a high-speed test pattern are provided to reduce a test time of test equipment and directly generate a specific data pattern, used to test a semiconductor memory, in the semiconductor memory to decrease a time required to load the data pattern. Command signals and address signals are grouped at a predetermined interval(S110). An effective command signal and an effective address signal are respectively extracted from each command signal group and each address signal group and compressed in a predetermined length(S120,S130). Position designation signal which respectively indicate the positions of the effective command signal and the effective address signal in each command signal group and each address signal group are generated and output(S140). A high-speed command signal and a high-speed address signal are respectively generated from the compressed effective command signal and the compressed effective address signal by using the position designation signals(S150).
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