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CMOS TFT WITH GRAIN-SIZE CONTROLLED POLYSILICON LAYER AND DISPLAY DEVICE USING THE SAME
CMOS TFT WITH GRAIN-SIZE CONTROLLED POLYSILICON LAYER AND DISPLAY DEVICE USING THE SAME
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机译：具有晶粒大小可控的多晶硅层的CMOS TFT和使用相同的显示装置
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摘要
PURPOSE: A CMOS(Complementary Metal Oxide Semiconductor) TFT(Thin Film Transistor) and a display device using the same are provided to secure a desired threshold voltage and current mobility by controlling the size of grains of a corresponding polysilicon layer in an N-type TFT or a P-type TFT according to the thickness of the polysilicon layer using ELA(Excimer Laser Annealing). CONSTITUTION: A first amorphous silicon layer of an N-type TFT and a second amorphous silicon layer of a P-type TFT are formed on a substrate(10). The thickness of the first amorphous silicon layer is larger than that of the second amorphous silicon layer. The first and second amorphous layers are transformed into a first polysilicon layer(12a) and a second polysilicon layer(12b) by using ELA. At this time, each size of first grains in the first polysilicon layer is smaller than that of second grains in the second polysilicon layer.
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