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CMOS TFT FOR CONTROLLING ELECTRICAL CHARACTERISTICS SUCH AS CURRENT MIGRATION AND ABSOLUTE VALUE DIFFERENCE BETWEEN THRESHOLD VOLTAGES BY INCREASING PRIMARY GRAIN BOUNDARY NUMBER OF ACTIVE CHANNEL OF N-TYPE TFT IN COMPARISON WITH PRIMARY GRAIN BOUNDARY NUMBER OF ACTIVE CHANNEL OF P-TYPE TFT AND DISPLAY DEVICE USING THE SAME
CMOS TFT FOR CONTROLLING ELECTRICAL CHARACTERISTICS SUCH AS CURRENT MIGRATION AND ABSOLUTE VALUE DIFFERENCE BETWEEN THRESHOLD VOLTAGES BY INCREASING PRIMARY GRAIN BOUNDARY NUMBER OF ACTIVE CHANNEL OF N-TYPE TFT IN COMPARISON WITH PRIMARY GRAIN BOUNDARY NUMBER OF ACTIVE CHANNEL OF P-TYPE TFT AND DISPLAY DEVICE USING THE SAME
PURPOSE: A CMOS TFT and a display device using the same are provided to control current migration and an absolute value difference between threshold voltages by increasing a primary grain boundary number of an active channel of an N-type TFT in comparison with a primary grain boundary number of the active channel of a P-type TFT. CONSTITUTION: Polysilicon patterns(11a,11b) are formed on an N-type TFT region(10a) and a P-type TFT region(10b) of a substrate(10). A gate insulating layer(13) is formed on the substrate. Gate electrodes(14a,14b) of an N-type TFT and a P-type TFT are formed on the substrate. A lightly-doped source/drain region(15) is formed on both sides of the N-type TFT region. A highly-doped source/drain region(17) is formed on the P-type TFT region. A highly-doped source/drain region(19) is formed on the N-type TFT region. An interlayer dielectric(20) is formed thereon. A source/drain electrode(22a,22b) are formed by an etch process. The N-type TFT and the P-type TFT have different active channel directions, respectively. An angle between a primary grain boundary of the P-type TFT and an active channel is more than 60 degrees and less than 120 degrees. An angle between a primary grain boundary of the N-type TFT and the active channel is more than -30 degrees and less than 30 degrees.
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