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High performance internal bus for promoting design reuse in north bridge chips

机译:高性能内部总线,可促进北桥芯片中的设计重用

摘要

In an example embodiment, an apparatus providing communication in a computer system, comprises, a plurality of modules each having a master port and a slave port A secondary bus is shared between the plurality of modules for transmitting data and address information between a master port and a slave port of two modules. A bridge circuit coupled to the plurality of modules and the secondary bus, individually grants modules of the plurality of modules, access to the secondary bus. The bridge circuit establishes point-to-point communication paths between a master port and a slave port of two modules of the plurality of modules, for communicating handshake signals between them, and controls address and data phases between modules; two address phases can be outstanding simultaneously. The bridge circuit forwards address and data phases from one module to another module of the plurality of modules; the plurality of modules only interface with the bridge circuit.
机译:在示例实施例中,一种在计算机系统中提供通信的装置,包括:多个模块,每个模块具有主端口和从端口。在多个模块之间共享辅助总线,以在主端口和主端口之间传输数据和地址信息。两个模块的从端口。耦合到多个模块和次级总线的桥接电路分别授予多个模块中的模块访问次级总线的权限。桥接电路在多个模块中的两个模块的主端口和从端口之间建立点对点通信路径,以在它们之间传递握手信号,并控制模块之间的地址和数据相位。两个地址阶段可以同时突出。桥接电路将地址和数据阶段从一个模块转发到多个模块中的另一个模块。多个模块仅与桥接电路接口。

著录项

  • 公开/公告号US6581124B1

    专利类型

  • 公开/公告日2003-06-17

    原文格式PDF

  • 申请/专利权人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;

    申请/专利号US19980079498

  • 发明设计人 VISHAL ANAND;

    申请日1998-05-14

  • 分类号G06F131/40;

  • 国家 US

  • 入库时间 2022-08-22 00:06:52

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