首页> 外国专利> STENCIL MASK AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURED BY USING THE SAME STENCIL MASK, AND ITS MANUFACTURING METHOD

STENCIL MASK AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURED BY USING THE SAME STENCIL MASK, AND ITS MANUFACTURING METHOD

机译:模板框及其制造方法,使用相同模板框制造的半导体装置及其制造方法

摘要

PROBLEM TO BE SOLVED: To provide a stencil mask which can practically be applied with pattern correction and is manufactured by performing the correction in a relatively short time although the conventional pattern correction of the stencil mask using finite element method stress analysis requires an unpracticable and unrealistic processing time since object stencil holes are very many.;SOLUTION: When stencil mask pattern data are corrected by stress analysis, a displacement quantity is calculated by using stencil holes larger than specific size among respective stencil patterns. Consequently, stencil mask pattern data having a pattern having been correct in an industrially applicable relatively-short time are obtained and then the stencil mask having a desired pattern formed can be obtained by being manufactured according to the pattern.;COPYRIGHT: (C)2003,JPO
机译:要解决的问题:提供一种模版掩模,该模板掩模可以在实际中进行图案校正,并且通过在相对较短的时间内执行校正来制造,尽管使用有限元法应力分析的常规模板掩模图案校正是不切实际和不现实的由于目标模板孔非常多,因此需要大量的处理时间。解决方案:通过应力分析校正模板掩模图案数据时,将使用大于各个模板图案中特定尺寸的模板孔来计算位移量。因此,获得具有在工业上可应用的相对短的时间内正确的图案的模板掩模图案数据,然后可以通过根据该图案进行制造来获得具有所形成的期望图案的模板掩模。COPYRIGHT:(C)2003 ,日本特许厅

著录项

  • 公开/公告号JP2003017397A

    专利类型

  • 公开/公告日2003-01-17

    原文格式PDF

  • 申请/专利权人 SONY CORP;

    申请/专利号JP20010203533

  • 发明设计人 ASHIDA ISAO;

    申请日2001-07-04

  • 分类号H01L21/027;G03F1/16;

  • 国家 JP

  • 入库时间 2022-08-22 00:16:04

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