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Ionizing dose hardness assurance technique for CMOS integrated circuits

机译:CMOS集成电路的电离剂量硬度保证技术

摘要

A method for testing IC devices for radiation hardness in a non-destructive manner, comprising subjecting a device under test (DUT) originally in an insensitized state, to a state in which the DUT is more sensitive to adverse effects of ionizing dose radiation and while the DUT is in the more sensitive state, subjecting the DUT to a low level of ionizing radiation to degrade performance of the DUT and electrical testing followed by a restoration of the DUT to its original insensitized state.
机译:一种用于以无损方式测试IC器件辐射硬度的方法,包括使最初处于不敏感状态的被测器件(DUT)处于DUT对电离剂量辐射的不利影响更为敏感的状态,而DUT处于更敏感的状态,使DUT经受低水平的电离辐射以降低DUT的性能,并进行电测试,然后将DUT恢复到其原始的不敏感状态。

著录项

  • 公开/公告号US6476597B1

    专利类型

  • 公开/公告日2002-11-05

    原文格式PDF

  • 申请/专利权人 FULL CIRCLE RESEARCH INC.;

    申请/专利号US20000483893

  • 发明设计人 ROLAND E. LEADON;JAMES P SPRATT;

    申请日2000-01-18

  • 分类号G01R312/60;

  • 国家 US

  • 入库时间 2022-08-22 00:46:55

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