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Process for fabricating dual-gate CMOS having in-situ nitrogen- doped polysilicon by rapid thermal chemical vapor deposition
Process for fabricating dual-gate CMOS having in-situ nitrogen- doped polysilicon by rapid thermal chemical vapor deposition
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机译：通过快速热化学气相沉积制造具有原位氮掺杂多晶硅的双栅CMOS工艺
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摘要
A process for fabricating dual-gate CMOS of semiconductor devices having in-situ nitrogen-doped polysilicon by rapid thermal chemical vapor deposition in a rapid thermal reactor is disclosed. The process comprises the steps of first fabricating components of the dual- gate CMOS on a semiconductor silicon substrate. The dual-gate CMOS components includes P- and N-wells and source/drain regions formed in the silicon substrate. Gate oxide for the dual-gate CMOS is then grown. A thin nitrogen-doped polysilicon film is then deposited over the gates, and followed by the deposition of a undoped polysilicon film, which covers over the surface of the thin nitrogen-doped polysilicon film. Ions are then implanted into the dual-gates CMOS. In the process, the thin nitrogen-doped polysilicon film is deposited by introducing SiH.sub.4 and NH.sub.3 gas mixture into the rapid thermal reactor under a pressure of about 0.4 torr at about 750. degree. C. The thin nitrogen-doped polysilicon film has a thickness of about 60 Å. The undoped polysilicon film is formed by deposition of SiH.sub.4 after the NH.sub.3 gas is evacuated from the rapid thermal reactor, and has a thickness of about 2,000 to 3,000 Å. N.sub.2 O, NO and O.sub.2 gases may be utilized in the rapid thermal procedure for the formation of the oxide layer. Once the oxide layer is formed, the process of forming polysilicon may be continued in the reaction chamber without needing to be exposed to the ambient air. Contamination to the device is therefore avoided and the product yield rate improved. The rapid thermal reactor employed in the process is a load-locked single reactor.
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机译：公开了通过在快速热反应器中进行快速热化学气相沉积来制造具有原位掺杂氮的多晶硅的半导体器件的双栅CMOS的方法。该工艺包括以下步骤：首先在半导体硅衬底上制造双栅极CMOS的组件。双栅CMOS组件包括P阱和N阱以及形成在硅衬底中的源/漏区。然后生长用于双栅CMOS的栅氧化物。然后，在栅极上沉积氮掺杂的多晶硅薄膜，然后沉积未掺杂的多晶硅膜，该未掺杂的多晶硅膜覆盖氮掺杂的多晶硅薄膜的表面。然后将离子注入到双栅极CMOS中。在该方法中，通过在约750℃的约0.4托的压力下将SiH 4和NH 3气体混合物引入到快速热反应器中来沉积氮掺杂的多晶硅薄膜。氮掺杂的多晶硅薄膜的厚度约为60＆。从快速热反应器中排出NH 3气体后，通过沉积SiH 4形成未掺杂的多晶硅膜，其厚度约为2,000至3,000＆。 N 2 O，NO和O 2气体可以在快速热过程中用于形成氧化物层。一旦形成氧化物层，就可以在反应室中继续进行形成多晶硅的过程，而无需暴露于环境空气中。因此避免了对装置的污染，并且提高了产品产率。该方法中使用的快速热反应器是负载锁定的单反应器。
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