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Trench MOSFET with multi-resistivity drain to provide low on-resistance

机译:沟槽式MOSFET具有多电阻漏极以提供低导通电阻

摘要

A MOSFET switch with a gate formed in a trench has a drain which includes a region of relatively high resistivity adjacent the trench and a region of relatively low resistivity further away from the trench. The drain may also include a "delta" layer having even lower resistivity in a central region of the MOSFET cell. The high resistivity region limits the strength of the electric field at the edge of the trench (particularly where there are any sharp corners) and thereby avoids damage to the gate oxide layer. The central "delta" layer helps to insure that any breakdown will occur near the center of the MOSFET cell, away from the gate oxide, and to lower the resistance of the MOSFET when it is in an on condition.
机译:具有在沟槽中形成的栅极的MOSFET开关具有漏极,该漏极包括与沟槽相邻的电阻率相对较高的区域和与沟槽相距较远的电阻率较低的区域。漏极还可包括在MOSFET单元的中心区域具有甚至更低的电阻率的“δ”层。高电阻率区域限制了沟槽边缘(特别是在存在任何尖角的地方)处的电场强度,从而避免了对栅氧化层的损坏。中央“δ”层有助于确保在MOSFET单元的中心附近,远离栅极氧化物的地方发生击穿,并在MOSFET处于导通状态时降低其电阻。

著录项

  • 公开/公告号EP0720236A2

    专利类型

  • 公开/公告日1996-07-03

    原文格式PDF

  • 申请/专利权人 SILICONIX INCORPORATED;

    申请/专利号EP19950309536

  • 发明设计人 DARWISH MOHAMMED N.;WILLIAMS RICHARD K.;

    申请日1995-12-29

  • 分类号H01L29/78;

  • 国家 EP

  • 入库时间 2022-08-22 03:46:47

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