首页> 外国专利> System for connecting plurality of electronic units to data and clock buses wherein transmitting and receiving data in synchronization with transmitting and receiving clock signals

System for connecting plurality of electronic units to data and clock buses wherein transmitting and receiving data in synchronization with transmitting and receiving clock signals

机译:用于将多个电子单元连接到数据和时钟总线的系统,其中与发送和接收时钟信号同步地发送和接收数据

摘要

A data processing apparatus, including a number of electronic circuit units, in which high-speed data can be transmitted among the electronic circuit units. When data is transmitted from one electronic circuit unit to another electronic circuit unit, a clock signal to fetch the data in the sink side electronic circuit unit is transmitted from the source side electronic circuit unit via a clock signal line having the same signal propagation delay characteristics as those of the data signal line.
机译:一种数据处理设备,包括多个电子电路单元,其中可以在电子电路单元之间传输高速数据。当数据从一个电子电路单元传输到另一电子电路单元时,经由具有相同信号传播延迟特性的时钟信号线从源侧电子电路单元传输用于在宿侧电子电路单元中获取数据的时钟信号。就像数据信号线一样

著录项

  • 公开/公告号US5452436A

    专利类型

  • 公开/公告日1995-09-19

    原文格式PDF

  • 申请/专利权人 HITACHI LTD.;

    申请/专利号US19950367927

  • 申请日1995-01-03

  • 分类号G06F1/04;

  • 国家 US

  • 入库时间 2022-08-22 04:04:21

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号