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SEMICONDUCTOR DYNAMIC MEMORY DEVICE WITH METAL-LEVEL SELECTION OF PAGE MODE OR NIBBLE MODE
SEMICONDUCTOR DYNAMIC MEMORY DEVICE WITH METAL-LEVEL SELECTION OF PAGE MODE OR NIBBLE MODE
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机译:具有页面模式或敏捷模式的金属级别选择的半导体动态存储器
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摘要
A semiconductor dynamic memory device contains circuitry for implementing either page mode or nibble mode access using a selected conductor connection. A clock voltage used in column decoding and outputting is coupled either from the column strobe or the &upbar& C input by a conductor so that the clock voltage is rendered either dependent upon or independent from the cycling of the column strobe.
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